Job: SUb system verification, UVM, System verilog, 8-12years, Bangalore, Best in industry, Notice period max 30 days

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Title SUb system verification, UVM, System verilog, 8-12years, Bangalore, Best in industry, Notice period max 30 days
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Categories Embedded Jobs
Salary Best in the Industry
Total Yrs Of Experience Required 8-12 years
Job Location Bangalore
Job Description

 SV UVM experience
– Defining verification strategy, architecting testbench 

– Independently developed a testbench from scratch 

– Experience of complete verification cycle in more than one project
– Ability to guide junior resources
– Good presentation skills
Perl or Python scripting experience
Exp – 8 to 12 years 

We need people who can join in max of 4 weeks. 

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